Generalizing hardware acceleration for nonlinear functions

December 2023 – December 2025

Objective
This project aims to propose the generalized design method and computational architecture of more than 20 kinds of nonlinear functions. By this they can be used in more algorithm acceleration without doing a lot of repetitive development work.

Background
As the foundation of the future development of smart society, the digital chips play a key role. Behind these digital chips is the hardware acceleration of a large number of algorithms. The essence of the algorithm is mathematical operation, the most complex mathematical operation is nonlinear function calculation. So the proposed research question is how to improve the universality of nonlinear function VLSI design without affecting the performance and efficiency? It is a challenge.

About the Digital Futures Postdoc Fellow
Hui Chen received a PhD from Nanjing University (NJU) in 2022, China. His major is information and communication engineering. Hui’s research interests include arithmetic circuits, integrated circuits for elementary functions and reconfigurable computing.

Main supervisor
Zhonghai Lu, Professor at the Division of Electronics and Embedded Systems, Department of Electrical Engineering, School of Electrical Engineering and Computer Science (EECS), KTH.

Co-supervisor
Masoumeh Ebrahimi, Associate Professor, Division of Electronics and Embedded Systems, Department of Electrical Engineering, School of Electrical Engineering and Computer Science (EECS), KTH.